Voting With Their Feet

There is a poll that interests me, and the results won’t be known until a couple months from now. It’s the one that unfolds at DesignCon every year as attendees choose which sessions to attend.

We take this poll to do more than just confirm that each room has enough chairs. As I described in an earlier blog, we begin planning for the next DesignCon technical program each year with a look back at the one just concluded a few weeks earlier. We include a look at the average session attendance for each track to help uncover shifts in interest.

Unlike political polling, ours is not an exercise to determine winners and losers. Sure, tracks that poll well ought to reappear in the next program. But we also know we should continue to make room for topics of importance to small but essential segments of the community. In addition, we must keep an eye out for emerging topics that need some time to develop audiences.

More than anything else, session attendance reveals trends we should capture in the Call for Papers. If we do our job well, authors will respond with relevant contributions and draw interested audiences.

So let’s take a look at how the DesignCon 2012 tracks polled among attendees. Listed in order from highest to lowest average session attendance, the results are shown below:

1. Track 11, Power Integrity and Power Distribution Network Design
2. Track 5, PCB Materials, Processing and Characterization
3. Track 8, High-Speed Serial Design
4. Track 14, RF/Microwave Techniques for Signal Integrity
5. Track 9, High-Speed Timing, Jitter and Noise Analysis
6. Track 6, PCB Design Tools and Methodologies
7. Track 13, Test and Measurement Methodology
8. Track 7, Memory and Parallel Interface Design
9. Track 10, High-Speed Signal Processing, Equalization and Coding
10. Track 4, System Co-Design: Chip/Package/Board
11. Track 2, Analog and Mixed-Signal Design and Verification
12. Track 12, Electromagnetic Compatibility and Interference
13. Track 1, Chip-Level Design for Signal/Power Integrity
14. Track 3, FPGA Design and Debug

If the interests of attendees at DesignCon 2013 are anything like their counterparts in 2012, they should find plenty to draw their attention next January. The 2013 program will offer a total of 28 papers in last year’s top three tracks, a 17 percent increase over the number of papers in these tracks in the 2012 program.

Just to show that the DesignCon program committee is not totally enslaved to poll results, the track with the greatest increase in the number of sessions came in at No. 11 in the list above. Vigorous campaigning by the organizers of Track 2 -- aided perhaps by the addition of “RF” to the track title for the 2013 program -- yielded a strong response to the Call for Papers in this area and a corresponding doubling in the number of sessions.

As a good campaigner myself, I should close with a strong pitch to register and vote. Registration is open now online. We also accept on-site registrants at the polling location itself, the Santa Clara Convention Center, where voting takes place throughout DesignCon, January 28 to 31. And while early voting is not an option, you really can vote often by attending as many DesignCon sessions as you wish.

Related post:  

• The Making of a Technical Program