Brice Achkir is a Distinguished Engineer at Cisco Systems, focusing on high-speed architecture/design and signal/power integrity. His research interests include high-speed digital and mixed-signal designs, active and adaptive optics, and networking. He has also done research and development in optics, where he continues to focus on the next generation of technologies and architectures. With Cisco since 2000, where he has filled different positions, Brice has previous experience with many companies, including ITF Optical Technologies, Beltron, SCI, and IRH. He holds BS, MS, and PhD degrees in applied physics, physics, and electrical engineering.
Dr. Bruce Archambeault is an IBM Distinguished Engineer in Research Triangle Park, N.C. He received his BSEE degree from the University of New Hampshire in 1977 and his MSEE degree from Northeastern University in 1981. He received his PhD from the University of New Hampshire in 1997. His doctoral research was in the area of computational electromagnetics applied to real-world EMC problems. Dr. Archambeault has authored or co-authored a number of papers in computational electromagnetics, mostly applied to real-world EMC applications. He is a member of the Board of Directors for the IEEE EMC Society and a past Board of Directors member for the Applied Computational Electromagnetics Society (ACES). He currently serves as the chair for the Technical Activities Committee and Vice President for conferences of the EMC Society. He has served as a past IEEE/EMCS Distinguished Lecturer and Associate Editor for the IEEE Transactions on Electromagnetic Compatibility. He is the author of PCB Design for Real-World EMI Control and the lead author of EMI/EMC Computational Modeling Handbook.
Brian Bailey is an independent consultant working in the fields of Electronic System Level (ESL) methodologies and functional verification. Prior to this he was the chief technologist for verification at Mentor Graphics. He is the editor for the EETimes EDA Designline and a contributing editor to EDN. He has published six books (working on book number seven – some people never learn), given talks around the world, chairs international standards committees (is he crazy?), and sits on the technical advisory board for several EDA companies. Brian graduated from Brunel University in England with a first class honours [sic] degree in electrical and electronic engineering (yes – he is a Brit, so of course he is crazy). He may also be found at Brian Bailey Consulting.
Shiv Balakrishnan is an expert in Digital Signal Processing (DSP) and has worked for many years in the Semiconductor and Test & Measurement Industries. He graduated from the Indian Institute of Technology and the University of Florida.
Mike Beaver is an independent consultant in the Bay Area with a semiconductor industry background. He began as a process engineer in the RF/microwave area and has worked on technologies from CMOS to bubble memories, superconductors, magnetic discs, and power mosfets. He has also worked and consulted in MES systems, software development, supply chain, and RFID. He holds a certificate from the Alien Academy, an MSEE from USC, and a BS in engineering from Caltech where Carver Mead pointed him down the road toward the semiconductor industry. Mike's interests range from microcontrollers to solar systems, home automation, and backpacking. He built his own house and workshop and has the tools to make a respectable pile of chips out of most materials. He hasn't lost that excitement he felt as a kid when he saw a cool new product or tool.
Wendem Beyene is a Signal Integrity Engineer at Rambus Inc., where he is responsible for signal and power integrity of multi-gigabit serial and parallel interfaces. His professional interests are signals and systems in general and simulation and optimization of deterministic and stochastic systems in particular. Specific current interests include error-correction coding and link architecture, efficient simulation and analysis of noise and jitter, and parameter variations in large distributed networks and high-speed links. He received his BS and MS degrees in electrical engineering from Columbia University, in 1988 and 1991, respectively, and his PhD in electrical and computer engineering from the University of Illinois at Urbana-Champaign, in 1997.
Dr. Eric Bogatin is currently a Signal Integrity Evangelist with Bogatin Enterprises, part of Teledyne LeCroy, where he teaches advanced signal integrity classes. He received his BS degree in physics from MIT in 1976 and MS and PhD degrees in physics from the University of Arizona in Tucson in 1980. He has held senior engineering and management positions at Bell Labs, Raychem, Sun Microsystems, Ansoft, and Interconnect Devices. Eric has written six books on signal integrity and interconnect design and more than 300 papers. Many of these are posted for free download at www.beTheSignal.com. His latest book, Signal and Power Integrity – Simplified, was published in 2009 by Prentice Hall.
Dr. Daniel Chow is a Principal Signal Integrity Engineer at Altera Corp. His responsibilities include defining design, testing, and validation methodologies for signal integrity, power integrity, and jitter analysis with emphasis in high-speed components. Specifically, he is responsible for developing Altera's knowledge base on jitter-related issues. Before joining the industry, he was a research physicist with the US Department of Energy where he developed ultra-high sensitivity radiation detectors for NASA and Department of Defense. Dr. Chow received his PhD from the University of California, Davis.
Joseph C. (Jay) Diepenbrock worked in a number of development areas in IBM, including IC, analog and RF circuit, and backplane design. He then moved to IBM's Integrated Supply Chain, working on the electrical specification, testing, and modeling of connectors and cables, and was IBM's Subject Matter Expert on high-speed cables. After over 35 years at IBM, he left and joined the Lorom Group as Senior Vice President of High Speed and is leading the Lorom Signal Integrity team and supporting its high-speed product development. Jay has authored and co-authored a number of technical papers and contributed to a number of industry standards. He is a senior member of the IEEE, and holds 12 patents.
Michael J. Eager
Michael Eager is Principal Consultant at Eager Consulting in Palo Alto, Calif. He has a BS from Ohio University, where he studied electrical engineering but migrated toward linguistics and computer science when he found that parser design was more to his liking than bandpass filter design. He has over four decades' experience developing compilers, debuggers, and simulators for a wide range of processor architectures used in embedded systems. Current and former clients include major semiconductor companies and systems developers. Michael has been a member of the ISO C++ Standard Committee and ABI Committees for several processor architectures. He is chair of the Debugging Standards Committee for DWARF, the most widely used debug data format. He is active in the open-source and Linux communities.
Sanjeev Gupta has over 22 years of simulation and engineering experience in the electronics and EDA industries, dealing with high-frequency designs, simulation, modeling, and measurements. He spent 17 years with HP/Agilent in various roles and responsibilities related to high-frequency EDA design tools. His design experience includes wide varieties of RF/microwave millimeter wave circuits and subsystems. In the past eight years he has focused on signal integrity and power integrity designs. Sanjeev is currently employed by Avago Technologies' Fiber Optic Product division, as Senior Signal Integrity Lead Engineer. His responsibilities include design of 25Gbit/s PCBs for fiber-optic modules, including test board and reference designs.
Shamree Howard has been working in Test & Measurement for 10 years at Agilent Technologies. Her background in both RF and digital give her valuable knowledge to challenges engineers face. Working in outbound marketing allows her to work side by side with Agilent experts defining next generation products. In her previous role she helped designers understand and minimize the effects of Noise Figure in their designs. As Agilent's High Speed Digital Program Manager, Shamree has unique insights into standards compliance thanks to her colleagues who sit on the board of directors of standards committees such as: PCI-SIG, JEDEC, and VESA, to name a few. She holds an Electrical Engineering and French degree from Bucknell University, and International MBA from the University of Denver which took her to the far corners of Mongolia (ask her about it sometime).
Sunil Kakkar has more than 20 years of experience as a design verification engineer with companies including HP, IBM, Freescale, Qualcomm, and Sony. At IBM, he played the role of a chief technologist for the e-verification initiative and was responsible for the deployment of the formal verification technology in Europe and Asia/Pacific. At Freescale Semiconductor, he headed the verification strategy group, spearheading the concept of a unified synthesizable test bench that can be deployed right from the architecture verification stage to emulation stage and finally on the tester or the evaluation board. At SKAK Inc., a chip design and verification company he founded, he stresses designs that are correct by concept and emphasizes functional formal verification with SVA assertions in equal proportion to the traditional verification techniques. He believes that the current verification paradigms are at the point of a fundamental shift in terms of the strategies that we deploy to verify today. Sunil holds a Bachelor's degree in engineering from IIT in India and a Master's degree in computer science from the University of Illinois.
Janine began working as a professional writer more than 19 years ago. Currently, she is editor in chief at Test & Measurement World and a contributing editor for EDN. Previously, Janine served as site editor for EETimes' RF&Microwave Designline, Test&Measurement Designline, and Memory Designline , also part of UBM Tech. Before joining UBM, she edited the book World Class Designs: RF Front End and worked with numerous publications in staff and freelance capacities, including Microwaves & RF, Wireless Systems Design, Communication Systems Design, Wireless Design Online, and Global Telephony. A member of NASW and ACS, Janine holds a Bachelor's Degree from the University of Delaware and a Master's Degree from Duquesne University.
Patrick Mannion has been in the electronics industry for so many years that he's earned the title of 'veteran'. Starting in engineering, he went on a world tour in 1989 and landed in New York, and never really left since. And why would he? He's been travelling, writing about, covering, participating and generally having fun within the electronics industry ever since. His various roles range from editor, to content director, to his current title of brand director for EDN, Test & Measurement World and Planet Analog. He can be reached at firstname.lastname@example.org.
Alfred P. Neves
Al Neves has 30 years of experience in the design and application development of semiconductor products and in capital equipment design focused on jitter and signal integrity analysis. He has recently been focusing on developing products for the Signal Integrity Practitioner as a consultant and is also Test-Measurement track chair in DesignCon and a high-speed system-level design manager and engineer. Recent technical accomplishments include development of platforms to improve 3D electromagnetic correspondence to measure-based VNA and TDR methods. Al earned a BS in Applied Mathematics at the University of Massachusetts. He can be contacted at email@example.com.
Founder and President of Speeding Edge, Lee Ritchey is considered one of the industry's premier authorities on high-speed PCB and system design. He conducts onsite private training courses for technology companies and has taught courses for UC Berkeley's extension program and at industry tradeshow technical conferences. In addition, he provides consulting services to top manufacturers of Internet and server products. He is the author of two leading books on high-speed design disciplines, Right the First Time, a Practical Handbook on High Speed PCB and System Design, Volumes 1 & 2. Ritchey also the author and publisher of a quarterly newsletter, Current Source, that is dedicated to discussing ongoing topics of concern in the high-speed design industry.
Prior to founding Speeding Edge, Ritchey served as Program Manager for 3Com in Santa Clara, Calif., where he was responsible for overseeing the signal-integrity aspects of hardware design and product packaging for the company's router, switch, hub, and NIC products. Before that, he served as Engineering Manager for Maxtor, responsible for the development of high-performance disc drives. He was co-founder and VP of Engineering and Marketing of Shared Resources, a design services company specializing in the design of high-end supercomputers, workstations, and image products. Earlier in his career, he designed RF and microwave components for the Apollo space program and other space platforms. Ritchey holds a BSEE from California State University, Sacramento. In 1998, he was profiled by EE Times as "The high-speed design ratchet man." In 2004, he began contributing a regular column, "PCB Perspectives," which appears in EE Times once a month.
Martin Rowe served as Technical Editor and Senior Technical Editor at Test & Measurement World for 20 years, including three years as EDN Design Ideas Editor. During that time, he covered a wide range of technologies and companies. Technologies included bench instruments such as oscilloscopes, meters, signal sources, and their applications. His favorite applications for these instruments were high-speed signal measurements (jitter, BER, crosstalk) basic measurements (voltage, current, power), calibration, and EMC/EMI/RFI. From 2004 to 2012, Martin visited numerous companies to learn how engineers performed test. Visits included Altera, PLX Technology, Finisar, and UNH Interoperability Lab.
Martin's true claim to fame comes from music, where he's written six songs about life as an engineer. It all started in 2006 with "The Measurement Blues," proving that you can write a blues about anything. "Below a GigaHertz" pays homage to engineers for whom working with signals below 1GHz is ancient history. Martin has performed "The Measurement Blues" and "The Lab in the Corner" live at IEEE EMC Symposia in 2009, 2010, and 2011.
Martin holds a BSEE from Worcester Polytechnic Institute and an MBA from Bentley College.
A graduate EE with an additional MA in journalism, Jack Shandle had been writing about electronics topics for more than two decades. He is the former editor and site manager of the WirelessNetDesignline website, which covered all aspects of wireless communications. Over the past decade, he has explored the gamut of wireless technology from GaAs semiconductors to cellular infrastructure to RFID. In addition to his freelance work with DesignCon, he has been the chief editor of two major publications for electronics engineers. After forming his company, e-ContentWorks, in 2001, Jack has provided a wide spectrum of content including articles, news releases, whitepapers, training courses, and brochures to companies as diverse as Vitesse, Applied Materials, and PricewaterhouseCoopers. Most of his work has been ghostwriting for semiconductor companies and contract engagements with major industry publications. He lives and works in San Francisco.
Katie Stern is the Conference Manager for DesignCon at UBM Tech, Electronics. In this role, she is responsible for overseeing the successful execution of the event, as well as driving the strategy for DesignCon. Prior to assuming this position, she served as the Content Program Manager for both DesignCon and Design East (formerly ESC Boston). She has been in the events industry for over 10 years, working for organizations such as PR University/Bulldog Reporter, Embassy Suites, MusicFest Orlando/Contest of Champions, Gaylord Palms, Walt Disney World, and the University of Oregon. Katie holds a BSBA from Nova Southeastern University and an MS in hospitality and tourism, specializing in events and conventions, from Rosen College of Hospitality Management at the University of Central Florida. She resides in the San Francisco Bay Area, the heart of all things tech.
Barry J. Sullivan
Barry Sullivan is Director of Program Development for the International Engineering Consortium. Prior to joining the IEC, he spent nine years at Ameritech, where he served as Director of Emerging Technologies. He has developed and delivered continuing education courses in communications technologies, and he guided the technology strategy for a start-up company delivering packet voice services. He was on the faculty of the Department of Electrical Engineering and Computer Science at Northwestern University for more than six years, and has taught there as an adjunct professor. He also worked as a member of technical staff at Bell Laboratories. He received the B.S.E.E. and M.S. degrees from Marquette University, and the Ph.D. degree from Princeton University, all in electrical engineering.
Barry has served as an associate editor of the IEEE Transactions on Signal Processing, publications chair of the International Conference on Acoustics, Speech, and Signal Processing, and local arrangements chair for the Digital Signal Processing Workshop. He was also editor of THE BRIDGE, the magazine of Eta Kappa Nu. He has published over forty papers on topics in signal reconstruction and image processing.
Colin Warwick is High-Speed Digital Product Manager at Agilent EEsof EDA, where he is focused on multigigabit per second design and analysis tools. Prior to joining Agilent, he was with Royal Signals and Radar Establishment in Malvern, England, Bell Labs in Holmdel, N.J., and The MathWorks in Natick, Mass. He completed his Bachelor, Master's, and Doctorate degrees in physics at the University of Oxford, England. He has published over 50 technical articles and holds thirteen patents.
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4/9/2013 1:00:00 PM
High speed digital chip-to-chip link performance is often limited by jitter in the multigigabit per second regime. It is a surprising fact that jitter can actually be amplified by a lossy channel even when the channel is linear, passive, and noiseless. In this webcast we will cover the basics of jitter amplification and show you how to accurately analysis the effect in your system using ADS Channel Simulator.