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Profile for Martin Rowe
Martin Rowe
Member Since: October 12, 2012
Blogger
Blog Posts: 18
Posts: 369



latest blogs
If one morning an imaginary supreme-engineering-being woke up and decided there should be a discipline known and high-speed digital design, what kind of ecosystem would have to be built?
The interface between the processor and the memory is perhaps the biggest problem that most systems face these days.
DesignCon papers can’t be commercials, but that doesn’t mean you can’t air out the techniques used in your products!
We need to inspire young people to become engineers.
We still need serial interfaces for going off chip, but it would appear that parallel interfaces are about to make a revival.
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archived
4/9/2013 1:00:00 PM

High speed digital chip-to-chip link performance is often limited by jitter in the multigigabit per second regime. It is a surprising fact that jitter can actually be amplified by a lossy channel even when the channel is linear, passive, and noiseless. In this webcast we will cover the basics of jitter amplification and show you how to accurately analysis the effect in your system using ADS Channel Simulator.
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